Check out our FAQ page to find out more about
the IEEE Nanotechnology Council!
IEEE NTC Facebook websites are linked below. It can also be linked to by the facebook option at the upper right corner of the front page of the NTC website.
NTC officers, members, conference/workshop organizers are invited to join it and post relevant information.
4.1 Open website in which only authorized members are allowed to post articles:
http://www.facebook.com/groups/ieeenanotechnology/ (https://www.facebook.com/groups/550239578466583/)
4.2 Open website in which only the web host is allowed to post articles: https://www.facebook.com/IEEENanotechnologyCouncil/?ref=aymt_homepage_panel
The NTC has several Linked-in sites:
Main NTC ‘company’ page: https://www.linkedin.com/company/ieee-ntc
NTC Women in Nanotechnology (WIN) ‘company’ page: https://linkedin.com/company/ieee-nanotechnology-council-women-in-nanotechnology
NTC Young Professionals (YP):
Call for Applications – NTC Chapter’s Innovation Grant
The IEEE NTC Chapters & Regional Activities Committee is calling for applications from NTC Chapters (student chapters included) for NTC Chapter’s Innovation Grant. The purpose is to support regional NTC Chapters to propose new innovative activities to be carried out in 2023/2024 and beyond. Up to USD$2500 can be applied from each eligible chapter.
Eligibility
All active NTC Chapters, but priority will be given to chapters that have not received any funding support from the Chapter’s committee in the last 3 years.
The Application Pack should
The selection committee
Prof. James Morris (Chair, NTC Liaison & Transnational Committee)
Prof. Malgorzata Chrzanowska-Jeske (NTC VP for Finance)
Prof. Xiaoning Jiang (NTC VP for Technical Activities)
Dr. Vasuda Bhatia (R1-7 Coordinator)
A/Prof. Attila Bonyar (R8 Coordinator)
Prof. Murilo Romero (R9 Coordinator)
Prof. Brajesh Kumar Kaushik (R10-India Coordinator)
Prof. Li Tao (R10-Other, Coordinator)
Prof. Lan Fu (NTC Chapters – Chair)
Important dates:
• Application open: Sept. 1, 2023
• Application close: Oct. 31, 2023
• Notification/Announcement of outcome: Nov. 15, 2023
The Congress “IEEE Nano Peru 2023: Trends in Nanoscience and Nanotechnology” will be held as a hybrid event according to the Peru time zone (GMT-5) from 3rd to 6th of October 2023. The congress venue will be the National University of San Marcos in Lima-Peru.
This event is the third edition of the congress “IEEE Nano Peru”, an annual collaborative endeavor between the Peru Chapter of the IEEE Nanotechnology Council and the IEEE Peru Section. The main purpose of the event is to introduce cutting-edge scientific topics in nanoscience and nanotechnology to Peruvian scientists as well as other researchers from the region. Additionally, it aims to inspire and motivate students and early-career researchers to explore these challenging research areas. The program will feature research works spanning from basic concepts to technological implementations across areas such as quantum computing, advanced nanomaterials, machine learning in nanotechnology, new trends in nanoelectronics and nano-biomedicine.
For more information about the congress “IEEE Nano Peru 2023”, visit the following link:
https://www.even3.com.pe/e/ieee-nanoperu-2023-364787/
The scientific program will cover plenary/invited talks from national and international recognized scientists as well as oral/poster contributions. The final program can be found in the Web Page of the event. The talks will be given in Spanish or English.
List of plenary/invited speaker (confirmed):
CALL FOR PARTICIPATION
IEEE P62659™, Standard for Nanomanufacturing — Large Scale Manufacturing for Nanoelectronics, Working Group Kick-Off Meeting
IEEE Standards Association (IEEE SA) invites you to participate in the Working Group for IEEE P62659™, Standard for Nanomanufacturing – Large Scale Manufacturing for Nanoelectronics. This is a jointly developed revision with IEC.
This International Standard provides a framework for introducing nanoelectronics into large-scale, high-volume production in semiconductor manufacturing facilities through the incorporation of nanomaterials (e.g. carbon nanotubes, graphene, quantum dots, etc.). Since semiconductor manufacturing facilities need to incorporate practices that maintain high yields, there are very strict requirements for how manufacturing is performed. Nanomaterials represent a potential contaminant in semiconductor manufacturing facilities and need to be introduced in a structured and methodical way. This International Standard provides steps employed to facilitate the introduction of nanomaterials into the semiconductor manufacturing facilities. This sequence is described under the areas of raw materials acquisition, materials processing, design, integrated circuits (IC) fabrication, testing, and end-use. These activities represent the major stages of the supply chain in semiconductor manufacturing facilities.
WHY GET INVOLVED
This is a jointly developed revision with IEC. This Standard guides the integration of nanoelectronics into semiconductor manufacturing, ensuring the effective use of nanomaterials like carbon nanotubes. It enhances performance and cost-efficiency in cutting-edge electronics production. As Very Large Scale Integration (VLSI) nanomaterial research grows, industry adaptation becomes crucial for exploiting benefits. Adherence to this Standard is essential for seamless integration, capitalizing on nanomaterial advantages, and keeping pace with VLSI progress. The NTC/SC and IEC/TC113 have determined that no significant revisions to the document need to be performed. However, this working group will review the existing Standard and identify editorial and technical changes and, if appropriate, additions required to upgrade it to ensure that it reflects current technologies and applications.
MEETING INFORMATION
09/28/2023, 10:00 am US Eastern (UTC-4) via Webex Video Conferencing Services
To attend the kick-off meeting please indicate an interest in the project or email the Program Manager, Vanessa Lalitte, at v.lalitte@ieee.org.
LEARN MORE
Indicate your interest in this working group to receive ballot invitations and other notifications about the project through your IEEE Standards myProject account.
For additional information, including meeting link, contact:
Working Group Chair: Santhosh Sivasubramani, ragansanthosh@ieee.org
IEEE SA Program Manager: Vanessa Lalitte, v.lalitte@ieee.org
NTC/SC Chair & TC 113 Liaison: Tyler L. Jaynes, tyler.l.jaynes@ieee.org
The NTC Education Committee is pleased to announce the evaluation results of the Summer School proposals. NTC has accepted and will fund the following proposals:
Dates: Nov. 20-26, 2023
Contact: Dr. S. Sasikala, Associate Professor at Kumaraguru College of Technology, Coimbatore, Tamil Nadu, India
This summer school is designed to provide an intensive learning experience for aspiring participants such as graduate students, research scholars, faculty and industry professionals. The school will cover a range of topics including nanofabrication techniques, characterization methods, and applications in various fields. Participants will have the opportunity to learn from leading experts in this field, engage in hands-on activities and collaborate with peers.
Dates: Nov. 13-17, 2023
Contact: Dr. Santhosh Sivasubramani, Professor Dr. Jayaprakash; Hyderabad Section Chapter, Sreenidhi Institute of Science & Technology
Understanding the implications of nanotechnology advancements in robotics, materials, and electronics is vital in today’s rapidly evolving technological landscape. It paves the way for transformative breakthroughs in various sectors, from healthcare and manufacturing to energy and communication. This summer school serves as a gateway to explore how nanotechnology can revolutionize these domains, enabling smaller, faster, and more efficient devices with enhanced capabilities.
Dates: 3 days TBA
Contact: Prof. Shaibal Mukherjee, IEEE NTC Student Branch Chapter, Indian Institute of Technology Indore
The summer school program on “Artificial Intelligence and Internet of Things in Nanotechnology Towards Digital Agriculture (AIoT-NDA)” aims to provide a platform to participants to learn and apply specific skills of AI and IoT in agriculture from leading experts of industry and academia. Domains covered under this track of summer school would be role of nanotechnology in precision farming, agricultural drones and hopping systems, quantum sensors-based climate monitoring systems, AI and IoT based computer imaging.
Deadline: September 7, 2023
The IEEE Nanotechnology Council (NTC) is pleased to call for applications for student and young researcher support to attend the 18th IEEE Nanotechnology Materials and Devices Conference on 22-25 October 2023, in Paestum, Italy. (https://ieeenmdc.org/)
Eligibility: Candidates must be
Grantees will be required to submit a 2-page abstract in Papercept for presentation as a poster paper at NMDC.
Support will include:
Paestum is a World Heritage site south of Salerno which is south of Naples.
Email applications to Prof.James E. Morris at j.e.morris@ieee.org should include:
Application deadline: September 7, 2023
Organizer: Josef Weinbub, TC 10 Vice Chair, weinbub@iue.tuwien.ac.at
Format: 1 hour Webex webinars
Webinar 2
Date: October 12, 2023
Time: 16:00 PDT, 1:00 CEST, 08:00 JST
Speaker: Gerhard Klimeck, Professor and nanoHUB Director, Purdue University
Topic: nanoHUB for Research and Education in Nanoelectronics
Register below to receive meeting link
Abstract
Over 200,000 nanoHUB users have run over 7 million simulations in Apps mostly focused on semiconductor devices and materials modeling. These apps provide very simple and intuitive interfaces to community and research codes that are hard to install, operate, and to maintain even for experts. As such nanoHUB created the first end-to-end scientific cloud enabling users to focus on solving problems rather than installing and maintaining software (before “the cloud” was a thing). Any portal provides access, installation, and compute cycles, however, usability is most often neglected. Most scientific tools focus on solving “any” simulation problem in a specific problem range. Such comprehensiveness makes these tools usable by experts only, typically after intensive training. nanoHUB has instead focused on delivering a spectrum of apps that individually have a limited capability compared to the underlying toolset, but as a whole set cover a vast swath of problems. Hundreds of community members have contributed over 700 Apps into nanoHUB.
We assembled some of these Apps that are essential for specific courses into small sets such as ABACUS (crystals, bandstructure, drift-diffusion, pn-junctions, BJTs, MOScaps, MOSFETs) [1]. The usability results are stunning. Our user analytics prove that over half of the simulation users participate in structured education through homework/project assignments. We can identify classroom sizes and detailed tool usage [2,3]. We can begin to build mind-maps of design explorations and assess depth of explorations for individuals and classes. While parts of academia struggled to innovate curricula, we have measured the median first-time App insertion into a class to be less than six months. Over 180 institutions have utilized nanoHUB in their curriculum innovation in over 3,600 classes. 2 million nanoHUB visitors explore lectures and tutorials annually. Over 2,700 papers cite nanoHUB in the scientific literature resulting in 68,300+ secondary citations and an equivalent h-index of 121.
With such a community presence we believe nanoHUB is the platform of choice to deliver online modeling, simulation, virtual environments, and lectures for the US initiative on workforce development and chip design [4]. We are in the process to build chipshub.org as a group inside nanoHUB. Chipshub hosts commercial and open-source chip design tools and associated apps and learning materials. It is hosted in Purdue’s hardware cloud.
[1] https://nanohub.org/groups/abacus ABACUS – Assembly of Basic Applications for Coordinated Understanding of Semiconductors. A one-stop-shop for teaching and learning semiconductor fundamentals.
[2] Krishna Madhavan, Michael Zentner, Gerhard Klimeck, “Learning and research in the cloud”, Nature Nanotechnology 8, 786–789 (2013)
[3] TEDx Talk, Klimeck, “Mythbusting Scientific Knowledge Transfer with nanoHUB.org”, https://www.youtube.com/watch?v=PK2GztIfJY4 .
Speaker:
Dr. Gerhard Klimeck is a Professor of Electrical and Computer Engineering at Purdue University; Director of the Network for Computational Nanotechnology; Reilly Director of the Center for Predictive Materials and Devices. He helped to create nanoHUB.org, the largest virtual nanotechnology user facility serving over 2.0 million global users, annually. Dr. Klimeck is a fellow of the Institute of Physics (IOP), the American Physical Society (APS), the Institute of Electrical and Electronics Engineers (IEEE), the American Association for the Advancement of Science (AAAS), and the German Humboldt Foundation. He has published over 525 printed scientific articles; he has been recognized for his co-invention of a single-atom transistor, quantum mechanical modeling theory, and simulation tools. His NEMO5 software has been used since 2015 at Intel to design nano-scaled design transistors. The nanoHUB team was recently recognized by a top 100 by R&D award – Making simulation and data pervasive.
The IEEE NTC Chapters & Regional Activities Committee is pleased to announce the appointment of Prof. Murilo A. Romero to the Chapter’s committee as the new Region-9 Coordinator.
Murilo A. Romero was born in Rio de Janeiro, Brazil, in 1965. He received the electrical engineering and the M.S. degrees in 1988 and 1991, both from the Catholic University of Rio de Janeiro, Brazil. In 1995, he received the Ph.D. degree from Drexel University, Philadelphia, USA. After his return to Brazil in 1995, he joined the University of Sao Paulo, at Sao Carlos, as a faculty member. At the University of Sao Paulo (USP), the largest and best ranked Brazilian university, he became an Associate Professor in 2001 and a Full Professor in 2008.
He was then Head of the Electrical Engineering Department at EESC-USP (from 2009-2013) and has also served as chair of the Electrical and Biomedical Engineering Committee of the Brazilian Research Council (CNPq, from 2011-2013). More recently, from 2014-2018, he was the Head of the Electrical Engineering area at CAPES, an agency of the Brazilian government, established to regulate and carry out quality control of graduate studies in Brazil (a process similar to the British REF or the Italian VQR).
His research interests span over a large variety of topics in semiconductor devices, optical communications and microwave-photonics. Samples of his research work can be found in more than 50 journal papers, including manuscripts at IEEE Transactions on Nanotechnology, IEEE Transactions on Microwave Theory and Techniques, IEEE Transactions on Circuits and Systems, IEEE Transactions on Electron Devices, IEEE Journal of Quantum Electronics, IEEE Photonics Technology Letters, IEEE/OSA Journal of Lightwave Technology, IEEE Sensors and IEEE Access, among others in top-ranked journals by other publishers.
He has served as editor in chief of the Scopus indexed Journal of Microwaves, Optoelectronics and Electromagnetics Applications, as well as served in a variety of international conference TPCs. He is now Associate Editor for Terahertz and Microwave Photonics for the newly launched journal Frontiers in Photonics.
Web of Science Profile: https://www.webofscience.com/wos/author/record/A-4698-2008
Scopus Profile: https://www.scopus.com/authid/detail.uri?authorId=7202431515
Google Scholar Profile: https://scholar.google.com.br/citations?user=0CQRNw0AAAAJ
Chapter’s Travel Grant for IEEE Nano Conference
The IEEE NTC Chapters & Regional Activities Committee is pleased to congratulate the following Chapter Travel Grant awardees for winning $1,500 each to attending the IEEE Nano 2023 and the NTC Adcom meeting in Jeju:
The event on women in nanotechnology that was held on 5th July for the interview and panel discussion with nanotechnology leaders were incredibly insightful and inspiring. The event provided a unique platform for nanotechnology leaders to share their personal journeys and life stories, with a particular emphasis on encouraging women and diverse groups. The stories shared were not only informative but also served as a source of motivation for aspiring professionals in the field. The caliber and expertise of the speakers were commendable. Their knowledge and experience provided valuable insights into the challenges and triumphs of working in nanotechnology. The panel discussion fostered a rich exchange of ideas and perspectives, leaving the audience with a deeper understanding of the industry and its potential. The session was organized by Dr. Kanika Singh, WIN Chair and moderated by Mr. Edward Perkins, NTC Secretary and speaker list included Prof. James Morris, Prof. Malgorzata Chrzanowska-Jeske, Prof. Montserrat Rivas, Prof. James Speice and Prof. Lan Fu and many participants attended who made this event a resounding success. The meticulous planning and seamless execution were apparent, and it was an engaging and informative experience for all attendees. The event play a crucial role in promoting diversity and inclusivity in the field of nanotechnology. By highlighting the achievements and challenges faced by women and men in academics and industry, Women in Nanotechnology(WIN) are not only inspiring the next generation of female professionals but also fostering an environment that values and encourages diversity. The knowledge and inspiration gained from the event will undoubtedly have a lasting impact on all the attendees.
Deep Jariwala is an Assistant Professor in Department of Electrical and Systems Engineering at the University of Pennsylvania (Penn). His research interests broadly lie at the intersection of new materials, surface science and solid-state devices for computing, sensing, opto-electronics and energy harvesting applications. Deep completed his undergraduate degree in Metallurgical Engineering from the Indian Institute of Technology, Banaras Hindu University in 2010. Deep went on to pursue his Ph.D. in Materials Science and Engineering at Northwestern University working on charge transport and electronic applications of two-dimensional (2D) semiconductors, graduating in 2015. Deep then moved to Caltech as a Resnick Prize Postdoctoral Fellow from 2015-2017 working on nanophotonic devices and ultrathin solar cells, before joining Penn in 2018 to launch his independent career.
Deep’s research has earned him awards of multiple professional societies including the Russell and Sigurd Varian Award and Paul H. Holloway Award of the American Vacuum Society, The Richard L. Greene Dissertation Award of the American Physical Society, Johannes and Julia Weertman Doctoral Fellowship, the Hilliard Award, the Army Research Office and Office of Naval Research Young Investigator Awards, Nanomaterials Young Investigator Award, TMS Frontiers in Materials Award, Intel Rising Star Award, IEEE Young Electrical Engineer of the Year Award, IEEE Photonics Society Young Investigator Award, IUPAP Early Career Scientist Prize in Semiconductors, IEEE Nanotechnology Council Young Investigator Award in addition to being named in Forbes Magazine list of 30 scientists under 30, is an invitee to Frontiers of Engineering conference of the National Academy of Engineering as well as a recipient of the Sloan Fellowship. Recently, his work on ferroelectric diode memory was also awarded with the Bell Labs Prize. In addition, he has also received the S. Reid Warren Jr. award given to one faculty member every year at Penn Engineering for inspiring and motivating undergraduate students through teaching. He also serves as Associate Editor for IEEE Photonics Technology Letters as well as npj 2D materials and applications. He has published over 100 journal papers with more than 16000 citations and several patents. At Penn he leads a research group comprising more than ten graduate and postdoctoral researchers supported by a variety of government agencies, industries and private foundations.
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