IEEE Nanotechnology Council
Advancing Nanotech for Humanity
IEEE

Archive for the ‘Webinar’ Category

NTC TC19 -Virtual Workshop on Chiplets

Wednesday, March 19th, 2025

Virtual Workshop on “Next Generation Computing in the Era of Chiplets”

 

Date: April 2, 2025

Start Time: 9:30am (CDT)

Timezone – Central

Length/ Duration: 90 minutes

Kick Off – Moitreyee Mukherjee-Roy (IBM) TC19 Chair

 

Speaker 1 – Joshua Rubin (IBM)

Title – Memory challenges and solutions for chiplets

ABSTRACT – The AI hardware industry landscape is full of diverse approaches to hardware design, ranging from large SoCs to chipletized systems based on both 3D and 2.xD packaging.  Even within the chipletized systems the chiplet architecture can vary greatly. Most current solutions are based on silicon designed by a single hardware vendor. In this workshop we will review the AI hardware industry landscape and compare the various approaches. Furthermore, we will explore a vision for disaggregation of IBM’s recently announced Spyre accelerator SoC, designed by IBM Research. We will look at how an AI chiplet in combination with other chiplets in an open chiplet ecosystem would enable creation of performant chiplet architectures for domain-specific applications.

Short BIO :

Joshua Rubin is a Senior Engineer at IBM, where he has been technical lead on projects dealing with wafer scale 3D integration, system performance analysis for novel technical elements, heterogeneous integration, and AI hardware design. An IBM Master Inventor, he holds over 90 patents in transistor design and integration, power distribution, 3D integration, packaging, and memory devices. He earned a PhD in electrical engineering at Cornell University. He has also published several technical articles and presented at several conferences including the Electronic Components and Technology Conference (ECTC), IEEE Journal of Solid-State Circuits (ISSCC), IEEE Electron Device Letters (EDL), and IEEE International Conference on MEMS. Most recently he was a technical lead for the packaging and card design of IBM’s latest Artificial Intelligence Unit (AIU) product.

Speaker 2 – Srikanth Rangarajan

Title: Advanced Thermal Management of Next-Generation of High-Performance Computing

Abstract: As high-performance computing (HPC) systems continue to evolve, the challenge of managing heat generated by increasingly powerful and compact electronic components has become paramount. This talk explores cutting-edge thermal management solutions that are paving the way for the next generation of HPC systems. We will discuss innovative approaches such as single- and two-phase liquid cooling. The presentation will also cover advancements in phase change materials for managing transient heat loads.  Additionally, the talk will examine the integration of artificial intelligence and machine learning into thermal management systems, enabling real-time temperature monitoring and predictive analysis for optimal cooling strategies. The talk will highlight how these technologies are not only addressing current thermal challenges but also enabling the development of more powerful, efficient, and reliable HPC systems for the future.

Short BIO:

Srikanth Rangarajan currently works as an Assistant Professor in the School of System Science and Industrial Engineering at Binghamton University. He received his M.S & Ph.D. in Mechanical Engineering from the Indian Institute of Technology Madras 2017. His research interests include Energy Storage management systems, electronic packaging, Digital twinning for electronics and batteries, Thermal energy storage, Thermal Management of electronics, and Data center cooling. Srikanth has published 35 international journal articles so far. Srikanth is also the author of the book “Phase Change Material Heat Sinks: A multi-objective Perspective.”

Prior to joining the School of System Science and Industrial Engineering, Srikanth worked as an Associate Research Professor in the Department of Mechanical Engineering at SUNY Binghamton

Research Interests

  • Thermal management, optimization, Digital Twinning and sustainability of electronic systems
  • Advanced packaging and heterogeneous integration of electronic systems
  • Data Center cooling
  • Digital twinning and optimization of battery systems
  • Thermal Energy Storage: Design and optimization

Speaker 3 – Si-Ping Gao:

Title – Power Delivery of Heterogeneous Integration: Challenges and Opportunities

As semiconductor design continues to evolve, chiplet technology has emerged as a promising solution to the limitations of traditional monolithic integrated circuits [1]. The shift towards chiplet-based heterogeneous integration (HI) offers flexibility, scalability, and improved manufacturing yields. However, this new approach presents significant challenges in power delivery. Efficient power delivery in HI systems is crucial to maintaining performance and reliability across multiple, independently manufactured and assembled die [2]. In this paper, we explore the key issues surrounding power delivery in HI architectures, including power integrity, voltage regulation, interconnect design, and thermal management [3]. We also propose innovative power delivery network (PDN) strategies tailored to the specific needs of chiplet designs. Our findings demonstrate how advanced PDN designs can mitigate power-related issues while supporting the energy efficiency, performance, and scalability demands of future semiconductor systems. This talk provides valuable insights for industry professionals and academics aiming to address the power delivery challenges inherent in the next generation of chiplet-based HI technologies.

References

[1]        K. Radhakrishnan, M. Swaminathan, and B. K. Bhattacharyya, “Power Delivery for High-Performance Microprocessors – Challenges, Solutions, and Future Trends,” IEEE Trans. Compon. Packag. Manuf. Technol, vol. 11, no. 4, pp. 655–671, Apr. 2021.

[2]        J. Kim et al., “Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse,” IEEE Trans. Very Large Scale Integr. Syst., vol. 28, no. 11, pp. 2424–2437, Nov. 2020.

[3]        J. Kim et al., “Chiplet/Interposer Co-Design for Power Delivery Network Optimization in Heterogeneous 2.5-D ICs,” IEEE Trans. Compon. Packag. Manuf. Technol, vol. 11, no. 12, pp. 2148–2157, Dec. 2021.

Short Bio:

Si-Ping Gao (Senior Member, IEEE) received the B.Eng., M.Eng. and D.Eng. degrees in electronic engineering from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China, in 2007, 2009, and 2013, respectively.

From 2013 to 2017, he was a Scientist with the Department of Electronics and Photonics, Institute of High Performance Computing (IHPC), A*STAR, Singapore. From 2017 to 2022, he was a Research Fellow in the Department of Electrical and Computer Engineering, National University of Singapore (NUS). From 2022 to 2024, he was a Senior Engineer of AMD. He is currently a Full Professor of NUAA. He has authored more than 100 refereed papers and one book chapter. He holds several patents. His research interests include EMC/EMI, signal and power integrity for 2.5D/3D ICs, and RFICs.

Dr. Gao received the Young Professional Award from the IEEE EMC Society in 2021 and many other technical awards including the APEMC 2016 Best Symposium Paper Award, the SPI 2017 Young Investigator Training Program Award, the URSI GASS 2017 Young Scientist Award, the Outstanding Young Scientist Award at the 2018 Joint IEEE EMC & APEMC Symposium, and the IEEE MTT-S IMWS-AMP 2020 Best Paper Award. He served as the TPC Chair and Co-chair of IEEE MTT-S IMWS-AMP 2025 and 2021, respectively, the Technical Paper Chair of APEMC 2022. He was a Distinguished Reviewer of IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY in 2023. He has been serving the IEEE EMC Singapore Chapter since 2016.

 

    2025 IEEE NTC TC 19- Heterogenous Integration and Chiplets Webinar Series

    Webinar April 2nd Registration (free)

    Your name

    Your email

    You will receive the meeting invitation in email

    I accept the IEEE Terms and Conditions and the IEEE Privacy Policy.

    Please note while it may seem the form is waiting after submit, the message has been sent, so you can leave this page after a few seconds.

    JxCDC-SSCS Webinar Series: Energy-Accuracy Trade-Offs in Resistive IMC Architectures

    Wednesday, January 29th, 2025

    SSCS Webinar Series – Professional Development Networking, and Career Growth 

     JxCDC SSCS Open Journal Webinar: Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures 

    Date: 6 February 2025
    Time: 2:00 pm – 4:00 pm EST
    Location: Webinar – Online
    Contact: Aeisha VanBuskirk – a.vanbuskirk@ieee.org

     

    Title:  Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures

    Abstract: Resistive in-memory computing (IMC) architectures currently lag behind SRAM IMCs and digital accelerators in both energy efficiency and compute density due to their low compute accuracy. To understand the reasons underlying this trend, we develop a behavioral model of resistive IMCs to analyze the signal-to-noise-plus-distortion ratio (SNDR) of MRAM, ReRAM, and FeFET-based IMCs, employing parameter variation and noise models which are validated w.r.t. measured results from a recent MRAM-based IMC prototype in a 22nm process.

    Presenters:

    Saion K. Roy Saion K. Roy (Member, IEEE) received his Ph.D. from the University of Illinois at Urbana–Champaign, USA, in 2024, and his B.Tech. and M.Tech. degrees from the Indian Institute of Technology Kharagpur, India, in 2018. 

    Naresh R. Shanbhag Naresh R. Shanbhag (Fellow, IEEE) received the Ph.D. degree in electrical engineering from the University of Minnesota, Minneapolis, MN, USA, in 1993. He is currently the Jack Kilby Professor of Electrical and Computer Engineering with the University of Illinois at Urbana-Champaign, Champaign, IL, USA.

    The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC) is sponsored by:

    IEEE Solid-State Circuits Society
    IEEE Magnetics Society
    IEEE Circuits and Systems Society
    IEEE Electron Devices Society
    IEEE Council of Electronic Design Automation
    IEEE Council on Superconductivity
    IEEE Nanotechnology Council

    IEEE Solid-State Circuits Society Webinar

    Friday, January 24th, 2025

     

    Mark your calendars! Join us on Feb 6th at 2 PM ET for an insightful Open Journal Webinar on “Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures” presented by the exceptional Saion K. Roy and Naresh R. Shanbhag.

    Register here: https://bit.ly/4gUonKD

    2024 IEEE NTC TC10 Modeling and Simulation December Webinar

    Thursday, October 17th, 2024

    Date: Wednesday, December 4, 2024

    Time: 08:00 AM Pacific time

    Speaker: Kevin Roche, Research Engineer & Quantum Ambassador, IBM Research Almaden

    Organizer: TC 10 Co-Chair, Josef Weinbub

    Title: A Practical Introduction to Quantum Computing

    Register below to receive meeting link

    Abstract:

    Quantum Computing is a developing technology that promises the exciting possibility of solving computational challenges not accessible with classical processors. It can also be the subject of a great deal of hype and exaggerated claims. This webinar will offer a practical view of the technology, beginning with a brief, accessible, introduction to the unusual physics harnessed by quantum processors, followed by a summary of the actual, practical technology currently available to the public and others, focusing on IBM Quantum’s offerings, then a short live demonstration (connectivity permitting) of interacting with the systems both via the web and Qiskit software libraries.

    Bio:

    Kevin Roche is a research engineer at IBM Research Almaden, specializing in materials for magnetoelectronics, spintronics, and other related fields. He is an expert in ultra-high-vacuum systems and thin-film deposition, data acquisition and laboratory automation. A native of the San Francisco Bay Area, Kevin earned his Bachelor’s degree in Physics at the University of California, Berkeley in 1983. He first joined IBM Research in 1982 as an American Physical Society intern; after completing his degree, he returned to IBM Research.

    Since 2002, Kevin has been introducing and explicating his work in physics and materials science publicly, making it accessible to audiences with a wide range of technical education; he was a featured expert on magnetic levitation for Episode 4 of Science and Star Wars. In 2017 he added quantum computing concepts to that role and is now both an official IBM Quantum Ambassador and a Qiskit Advocate. Kevin has been a dedicated science fiction fan since he learned to read, and his hobbies include building bartending robots, designing and making costumes, and running science fiction conventions; he was Chair of the 76th World Science Fiction Convention in August 2018.

     

    Register for meeting link:

      2024 IEEE NTC Modeling and Simulation Webinar Series

      Webinar December 4th Registration (free)

      Your name

      Your email

      You will receive the meeting invitation in email

      I accept the IEEE Terms and Conditions and the IEEE Privacy Policy.

      Please note while it may seem the form is waiting after submit, the message has been sent, so you can leave this page after a few seconds.

      2024 IEEE NTC TC10 Modeling and Simulation November Webinar

      Thursday, October 17th, 2024

      Date: Wednesday, November 13

      Time: 17:00 CET (UTC+1) Vienna (Austria) time (8AM PT/11AM ET)

      Speaker: Dr. Zlatan Stanojevic, CTO, Global TCAD Solutions

      Organizer: TC 10 Co-Chair, Josef Weinbub

      Title: Advanced Nanoscale MOSFET Simulation with the Subband Boltzmann Transport Equation

      Register below to receive meeting link.

      Abstract:

      Join us for an in-depth exploration of Nanoscale MOSFET Simulation using the Subband Boltzmann Transport Equation (SBTE), powered by the advanced GTS Nano Device Simulator (NDS). This webinar will guide you through the fundamentals of simulating MOSFETs at the nanoscale, focusing on device performance and transport phenomena. We will demonstrate live simulations and cover not only traditional silicon-based MOSFETs but also cutting-edge 1D and 2D materials like transition metal dichalcogenides (TMDs), graphene, and carbon nanotubes. Attendees will gain hands-on insights into modeling these materials and learn how to leverage the SBTE for advanced device design.

       

      Bio:

      Zlatan Stanojević holds MSc and PhD degrees in Microelectronics from the Vienna University of Technology, completed in 2009 and 2016, respectively. An expert in TCAD and advanced device simulation, he co-developed the Subband Boltzmann Transport Equation (SBTE) simulation method. As the Chief Technology Officer at Global TCAD Solutions, he oversees the company’s R&D efforts. A Senior IEEE member, he is actively engaged in the electron devices and nanotechnology communities, contributing to major journals and conferences such as IEDM, ESSDERC, SISPAD, or NMDC, on some of which he has also served as reviewer and technical committee member.

       

      Register for meeting link:

        2024 IEEE NTC Modeling and Simulation Webinar Series

        Webinar November 13th Registration (free)

        Your name

        Your email

        You will receive the meeting invitation in email

        I accept the IEEE Terms and Conditions and the IEEE Privacy Policy.

        Please note while it may seem the form is waiting after submit, the message has been sent, so you can leave this page after a few seconds.

        IEEE Nanotechnology Council and IEEE Sensors Council YPs Region 8 Webinar

        Monday, July 29th, 2024

        Join us for the next exciting webinar in our series, hosted by the IEEE NANOTECHNOLOGY COUNCIL & IEEE SENSORS COUNCIL Young Professionals Region 8

        Date & Time: 30 August 2024, 14:00 CET (UTC+2)

        Speaker: Jacek Ryl, Gdańsk University of Technology, Poland

        Topic: Multiparametric Impedance Discriminant Analysis – A New, Effective Tool to Study Macromolecular Fingerprints

        Don’t miss this opportunity to learn from a leading expert in the field!

        Register Now!  https://forms.gle/1GjeT2ryzsnh1K1Q6

        Abstract:

        The following talk will be dedicated to introducing the development in a novel approach to modus operandi of electrochemical biosensors. By implementing a real-time impedimetric monitoring under various electric field and combined with statistical data analysis tools we obtain full impedance characteristics constituting an explicit fingerprint of the macromolecular interactions [1,2]. This measurement methodology, multiparametric impedance discriminant analysis (MIDA), processes large amounts of generated impedimetric data and brings information on most effective measurement conditions (DC polarization, AC amplitude, frequency range, etc.). The proposed approach neglects some of affinity biosensors reproducibility issues, typically induced by non-specific adsorption and fouling.

        [1] Brodowski et al., Sens. Actuators B. Chem., 2022, 370, 132427. 10.1016/j.snb.2022.132427
        [2] Koterwa et al., Biosens. Bioelectron., 2023, 238, 115561. 10.1016/j.bios.2023.115561

        Bio:

        Jacek Ryl obtained his Ph.D. and D.Sc. in chemical technology in 2010 and 2018, respectively. From 2021, he works at the Institute of Nanotechnology and Materials Engineering, Faculty of Applied Physics and Mathematics, at Gdańsk University of Technology. He is the head of the Division of Electrochemistry and Surface Physicochemistry. In his scientific work, he focuses on topics related to electrochemical sensors, corrosion and degradation of functional materials, description of non-stationary electrode processes and surface physicochemistry. Currently, he conducts research related to the use of nanomaterials and additive technologies in molecular diagnostics.

        He was the PI of scientific projects (NCN Sonata, Sonata Bis, Opus, Iuventus+, KBN). He is a multiple winner of GUT Rector’s Awards for scientific achievements and awards for young scientists. He received a scholarship from the Ministry of Science and Higher Education (2017) and a scientific award from the 4th Division of Technical Sciences of the Polish Academy of Sciences (2019). He is the author or co-author of over 50 expert opinions and analyzes for industrial partners and numerous publications in renowned scientific journals. He is the member of the editorial boards editor for Green Biomaterials, Molecules and Frontiers in Chemistry. He is the author of over 200 JCR publications (H index = 34).

         

        2023 IEEE NTC TC10 Modeling and Simulation October Webinar

        Friday, August 4th, 2023

        IEEE Nanotechnology Council TC10 – Modeling and Simulation 2023 webinar series.

        Organizer: Josef Weinbub, TC 10 Vice Chair, weinbub@iue.tuwien.ac.at
        Format: 1 hour Webex webinars

        Webinar 2

        Date: October 12, 2023
        Time: 16:00 PDT, 1:00 CEST, 08:00 JST

        Speaker: Gerhard Klimeck, Professor and nanoHUB Director, Purdue University

        Topic: nanoHUB for Research and Education in Nanoelectronics

        Register below to receive meeting link

        Abstract

        Over 200,000 nanoHUB users have run over 7 million simulations in Apps mostly focused on semiconductor devices and materials modeling. These apps provide very simple and intuitive interfaces to community and research codes that are hard to install, operate, and to maintain even for experts.   As such nanoHUB created the first end-to-end scientific cloud enabling users to focus on solving problems rather than installing and maintaining software (before “the cloud” was a thing).  Any portal provides access, installation, and compute cycles, however, usability is most often neglected.  Most scientific tools focus on solving “any” simulation problem in a specific problem range.  Such comprehensiveness makes these tools usable by experts only, typically after intensive training.  nanoHUB has instead focused on delivering a spectrum of apps that individually have a limited capability compared to the underlying toolset, but as a whole set cover a vast swath of problems. Hundreds of community members have contributed over 700 Apps into nanoHUB.

        We assembled some of these Apps that are essential for specific courses into small sets such as ABACUS (crystals, bandstructure, drift-diffusion, pn-junctions, BJTs, MOScaps, MOSFETs) [1].  The usability results are stunning.  Our user analytics prove that over half of the simulation users participate in structured education through homework/project assignments.   We can identify classroom sizes and detailed tool usage [2,3]. We can begin to build mind-maps of design explorations and assess depth of explorations for individuals and classes. While parts of academia struggled to innovate curricula, we have measured the median first-time App insertion into a class to be less than six months.  Over 180 institutions have utilized nanoHUB in their curriculum innovation in over 3,600 classes.   2 million nanoHUB visitors explore lectures and tutorials annually.  Over 2,700 papers cite nanoHUB in the scientific literature resulting in 68,300+ secondary citations and an equivalent h-index of 121.

        With such a community presence we believe nanoHUB is the platform of choice to deliver online modeling, simulation, virtual environments, and lectures for the US initiative on workforce development and chip design [4]. We are in the process to build chipshub.org as a group inside nanoHUB.  Chipshub hosts commercial and open-source chip design tools and associated apps and learning materials.   It is hosted in Purdue’s hardware cloud.

        [1] https://nanohub.org/groups/abacus ABACUS – Assembly of Basic Applications for Coordinated Understanding of Semiconductors.  A one-stop-shop for teaching and learning semiconductor fundamentals.

        [2] Krishna Madhavan, Michael Zentner, Gerhard Klimeck, “Learning and research in the cloud”, Nature Nanotechnology 8, 786–789 (2013)

        [3] TEDx Talk, Klimeck, “Mythbusting Scientific Knowledge Transfer with nanoHUB.org”, https://www.youtube.com/watch?v=PK2GztIfJY4 .

        [4] https://chipshub.org

        Speaker:

        Dr. Gerhard Klimeck is a Professor of Electrical and Computer Engineering at Purdue University; Director of the Network for Computational Nanotechnology; Reilly Director of the Center for Predictive Materials and Devices. He helped to create nanoHUB.org, the largest virtual nanotechnology user facility serving over 2.0 million global users, annually. Dr. Klimeck is a fellow of the Institute of Physics (IOP), the American Physical Society (APS), the Institute of Electrical and Electronics Engineers (IEEE), the American Association for the Advancement of Science (AAAS), and the German Humboldt Foundation. He has published over 525 printed scientific articles; he has been recognized for his co-invention of a single-atom transistor, quantum mechanical modeling theory, and simulation tools. His NEMO5 software has been used since 2015 at Intel to design nano-scaled design transistors. The nanoHUB team was recently recognized by a top 100 by R&D award – Making simulation and data pervasive.

         

        Register for meeting link:

          2024 IEEE NTC Modeling and Simulation Webinar Series

          Webinar November 13th Registration (free)

          Your name

          Your email

          You will receive the meeting invitation in email

          I accept the IEEE Terms and Conditions and the IEEE Privacy Policy.

          Please note while it may seem the form is waiting after submit, the message has been sent, so you can leave this page after a few seconds.

           

          Webinar: Nanomaterials-Mediated Manipulation of Cellular Functions

          Tuesday, July 18th, 2023

          IEEE NANOTECHNOLOGY COUNCIL – Technical Committee 2 Nano-Biomedicine

          presents

          Webinar: “Nanomaterials-Mediated Manipulation of Cellular Functions”
          with Prof. Gianni Ciofani 

          When: Tuesday 12th September 2023
          11:00 AM (GMT +1 – Rome (IT))

          Registration link: https://oulu.zoom.us/meeting/register/u5Asfuuuqz0uE9QDaILd8N9mK1xEgQkd96_Q

          Abstract:

          The remote control of cellular functions through smart nanomaterials represents a bio-manipulation approach with unprecedented potential applications in many fields of medicine, ranging from cancer therapy to tissue engineering. By actively responding to external stimuli, smart nanomaterials act as real nanotransducers able to mediate and/or convert different forms of energy into both physical and chemical cues, fostering specific cell behaviors [1, 2].

          A new paradigm is proposed for nanomedicine, in order to exploit the intrinsic properties of nanomaterials as active devices rather than as passive structural units or carriers for medications.

          [1] – https://lnkd.in/d2R-kd25
          [2] – https://lnkd.in/dWBQYdbz

          Speaker:

          (more…)

          2023 IEEE NTC TC10 Modeling and Simulation June Webinar

          Monday, June 5th, 2023

          Date: June 27, 2023

          Topic: Atomistic TCAD Simulations
          Speaker: Philippe Blaise, Atomistic Senior Application Engineer, TCAD Division, Silvaco, Inc.

          Time: 8:00 PDT, 17:00 CEST, 00:00 JST

          Register below to receive meeting link.

          Recording is available here: https://ieeemeetings.webex.com/ieeemeetings/ldr.php?RCID=43909602dc9d04fba335a63a61e1a65f

           

           

          Abstract:

          For designing the most advanced technological nodes, quantum effects become hard to approximate. This leads to the failure of using conventional TCAD tools that are essentially based on empirical laws. Therefore, engineers need new simulation tools at the 5 nm node and below that combine a more fundamental formalism with affordable performances and ease of use. During this webinar, we will briefly describe what is behind the non-equilibrium Green’s function (NEGF) formalism with simplified arguments. We will show how simulating nano-devices becomes easy, even without full academic knowledge of the NEGF theory. The quantum complexity is hidden inside the simulation tool “VictoryAtomistic” which benefits from years of development at the highest level. We will show two test cases: a silicon Nanowire Field-Effect Transistor (NWFET) and a 2D-TMD Tunneling FET (TFET) made of a layer of MoS2. Thanks to a combination of state-of-the-art band structure calculations with the NEGF, predictive, versatile, and fast simulations of these devices become accessible with an environment that provides a smooth transition for TCAD users.

          Biography:

          Dr. Philippe Blaise has been a senior application engineer in atomistic simulation at Silvaco’s TCAD Division for four years. Prior to joining Silvaco, Dr. Blaise was a senior engineer specialized in atomistic simulation of new memory devices and transistors at CEA/LETI for 15 years. He is a former member of the IEEE IEDM Modelling and Simulation Committee. He is co-author of more than 60 papers in peer-review journals in the field and 30 contributions to conferences and workshops, plus 5 patents and one book chapter. Dr. Blaise holds a Master’s degree in applied mathematics and a Ph.D. in solid states physics from the Université Grenoble Alpes, France.

          Registration for meeting link

          registration closed

           

          2023 IEEE NTC TC10 Modeling and Simulation Webinar Series

          Monday, June 5th, 2023

          IEEE Nanotechnology Council TC10 – Modeling and Simulation announces its 2023 webinar series.

          Organizer: Josef Weinbub, TC 10 Vice Chair, weinbub@iue.tuwien.ac.at
          Format: 1 hour Webex webinars
          Announcements for each webinar will be posted with registration link to receive the link for that meeting.

          Webinar 1

          Date: June 27, 2023

          Time: 8:00 PDT, 17:00 CEST, 00:00 JST

          Speaker: Philippe Blaise, Atomistic Senior Application Engineer, Silvaco, Inc.

          Topic: Atomistic TCAD Simulations

           

          Webinar 2

          Date: October 12, 2023

          Time: 16:00 PDT, 1:00 CEST, 08:00 JST

          Speaker: Gerhard Klimeck, Professor and nanoHUB Director, Purdue University

          Topic: nanoHUB for Research and Education in Nanoelectronics

           

          Webinar 3

          Date: December 12, 2023

          Time: 23:00 PDT, 8:00 CEST, 15:00 JST

          Speaker: Tue Gunst, Senior R&D and Application Engineer, Synopsys QuantumATK

          Topic: QuantumATK Applied to Nanoelectronics