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Archive for the ‘TC10’ Category

2023 IEEE NTC TC10 Modeling and Simulation October Webinar

Friday, August 4th, 2023

IEEE Nanotechnology Council TC10 – Modeling and Simulation 2023 webinar series.

Organizer: Josef Weinbub, TC 10 Vice Chair, weinbub@iue.tuwien.ac.at
Format: 1 hour Webex webinars

Webinar 2

Date: October 12, 2023
Time: 16:00 PDT, 1:00 CEST, 08:00 JST

Speaker: Gerhard Klimeck, Professor and nanoHUB Director, Purdue University

Topic: nanoHUB for Research and Education in Nanoelectronics

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Abstract

Over 200,000 nanoHUB users have run over 7 million simulations in Apps mostly focused on semiconductor devices and materials modeling. These apps provide very simple and intuitive interfaces to community and research codes that are hard to install, operate, and to maintain even for experts.   As such nanoHUB created the first end-to-end scientific cloud enabling users to focus on solving problems rather than installing and maintaining software (before “the cloud” was a thing).  Any portal provides access, installation, and compute cycles, however, usability is most often neglected.  Most scientific tools focus on solving “any” simulation problem in a specific problem range.  Such comprehensiveness makes these tools usable by experts only, typically after intensive training.  nanoHUB has instead focused on delivering a spectrum of apps that individually have a limited capability compared to the underlying toolset, but as a whole set cover a vast swath of problems. Hundreds of community members have contributed over 700 Apps into nanoHUB.

We assembled some of these Apps that are essential for specific courses into small sets such as ABACUS (crystals, bandstructure, drift-diffusion, pn-junctions, BJTs, MOScaps, MOSFETs) [1].  The usability results are stunning.  Our user analytics prove that over half of the simulation users participate in structured education through homework/project assignments.   We can identify classroom sizes and detailed tool usage [2,3]. We can begin to build mind-maps of design explorations and assess depth of explorations for individuals and classes. While parts of academia struggled to innovate curricula, we have measured the median first-time App insertion into a class to be less than six months.  Over 180 institutions have utilized nanoHUB in their curriculum innovation in over 3,600 classes.   2 million nanoHUB visitors explore lectures and tutorials annually.  Over 2,700 papers cite nanoHUB in the scientific literature resulting in 68,300+ secondary citations and an equivalent h-index of 121.

With such a community presence we believe nanoHUB is the platform of choice to deliver online modeling, simulation, virtual environments, and lectures for the US initiative on workforce development and chip design [4]. We are in the process to build chipshub.org as a group inside nanoHUB.  Chipshub hosts commercial and open-source chip design tools and associated apps and learning materials.   It is hosted in Purdue’s hardware cloud.

[1] https://nanohub.org/groups/abacus ABACUS – Assembly of Basic Applications for Coordinated Understanding of Semiconductors.  A one-stop-shop for teaching and learning semiconductor fundamentals.

[2] Krishna Madhavan, Michael Zentner, Gerhard Klimeck, “Learning and research in the cloud”, Nature Nanotechnology 8, 786–789 (2013)

[3] TEDx Talk, Klimeck, “Mythbusting Scientific Knowledge Transfer with nanoHUB.org”, https://www.youtube.com/watch?v=PK2GztIfJY4 .

[4] https://chipshub.org

Speaker:

Dr. Gerhard Klimeck is a Professor of Electrical and Computer Engineering at Purdue University; Director of the Network for Computational Nanotechnology; Reilly Director of the Center for Predictive Materials and Devices. He helped to create nanoHUB.org, the largest virtual nanotechnology user facility serving over 2.0 million global users, annually. Dr. Klimeck is a fellow of the Institute of Physics (IOP), the American Physical Society (APS), the Institute of Electrical and Electronics Engineers (IEEE), the American Association for the Advancement of Science (AAAS), and the German Humboldt Foundation. He has published over 525 printed scientific articles; he has been recognized for his co-invention of a single-atom transistor, quantum mechanical modeling theory, and simulation tools. His NEMO5 software has been used since 2015 at Intel to design nano-scaled design transistors. The nanoHUB team was recently recognized by a top 100 by R&D award – Making simulation and data pervasive.

 

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    2023 IEEE NTC Modeling and Simulation Webinar Series

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    Meet 2023 IEEE Nano Early Career Award Recipient, Dr Deep Jariwala

    Thursday, July 20th, 2023

    Deep Jariwala is an Assistant Professor in Department of Electrical and Systems Engineering at the University of Pennsylvania (Penn). His research interests broadly lie at the intersection of new materials, surface science and solid-state devices for computing, sensing, opto-electronics and energy harvesting applications. Deep completed his undergraduate degree in Metallurgical Engineering from the Indian Institute of Technology, Banaras Hindu University in 2010. Deep went on to pursue his Ph.D. in Materials Science and Engineering at Northwestern University working on charge transport and electronic applications of two-dimensional (2D) semiconductors, graduating in 2015. Deep then moved to Caltech as a Resnick Prize Postdoctoral Fellow from 2015-2017 working on nanophotonic devices and ultrathin solar cells, before joining Penn in 2018 to launch his independent career.

    Deep’s research has earned him awards of multiple professional societies including the Russell and Sigurd Varian Award and Paul H. Holloway Award of the American Vacuum Society, The Richard L. Greene Dissertation Award of the American Physical Society, Johannes and Julia Weertman Doctoral Fellowship, the Hilliard Award, the Army Research Office and Office of Naval Research Young Investigator Awards, Nanomaterials Young Investigator Award, TMS Frontiers in Materials Award, Intel Rising Star Award, IEEE Young Electrical Engineer of the Year Award, IEEE Photonics Society Young Investigator Award, IUPAP Early Career Scientist Prize in Semiconductors, IEEE Nanotechnology Council Young Investigator Award in addition to being named in Forbes Magazine list of 30 scientists under 30, is an invitee to Frontiers of Engineering conference of the National Academy of Engineering as well as a recipient of the Sloan Fellowship. Recently, his work on ferroelectric diode memory was also awarded with the Bell Labs Prize. In addition, he has also received the S. Reid Warren Jr. award given to one faculty member every year at Penn Engineering for inspiring and motivating undergraduate students through teaching. He also serves as Associate Editor for IEEE Photonics Technology Letters as well as npj 2D materials and applications. He has published over 100 journal papers with more than 16000 citations and several patents. At Penn he leads a research group comprising more than ten graduate and postdoctoral researchers supported by a variety of government agencies, industries and private foundations.

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    2023 IEEE NTC TC10 Modeling and Simulation June Webinar

    Monday, June 5th, 2023

    Date: June 27, 2023

    Topic: Atomistic TCAD Simulations
    Speaker: Philippe Blaise, Atomistic Senior Application Engineer, TCAD Division, Silvaco, Inc.

    Time: 8:00 PDT, 17:00 CEST, 00:00 JST

    Register below to receive meeting link.

    Abstract:

    For designing the most advanced technological nodes, quantum effects become hard to approximate. This leads to the failure of using conventional TCAD tools that are essentially based on empirical laws. Therefore, engineers need new simulation tools at the 5 nm node and below that combine a more fundamental formalism with affordable performances and ease of use. During this webinar, we will briefly describe what is behind the non-equilibrium Green’s function (NEGF) formalism with simplified arguments. We will show how simulating nano-devices becomes easy, even without full academic knowledge of the NEGF theory. The quantum complexity is hidden inside the simulation tool “VictoryAtomistic” which benefits from years of development at the highest level. We will show two test cases: a silicon Nanowire Field-Effect Transistor (NWFET) and a 2D-TMD Tunneling FET (TFET) made of a layer of MoS2. Thanks to a combination of state-of-the-art band structure calculations with the NEGF, predictive, versatile, and fast simulations of these devices become accessible with an environment that provides a smooth transition for TCAD users.

    Biography:

    Dr. Philippe Blaise has been a senior application engineer in atomistic simulation at Silvaco’s TCAD Division for four years. Prior to joining Silvaco, Dr. Blaise was a senior engineer specialized in atomistic simulation of new memory devices and transistors at CEA/LETI for 15 years. He is a former member of the IEEE IEDM Modelling and Simulation Committee. He is co-author of more than 60 papers in peer-review journals in the field and 30 contributions to conferences and workshops, plus 5 patents and one book chapter. Dr. Blaise holds a Master’s degree in applied mathematics and a Ph.D. in solid states physics from the Université Grenoble Alpes, France.

    Registration for meeting link

      2023 IEEE NTC Modeling and Simulation Webinar Series

      Webinar 2 October 12 Registration (free)

      Your name

      Your email

      You will receive the meeting invitation in email

      I accept the IEEE Terms and Conditions and the IEEE Privacy Policy.

      Please note while it may seem the form is waiting after submit, the message has been sent, so you can leave this page after a few seconds.

       

      2023 IEEE NTC TC10 Modeling and Simulation Webinar Series

      Monday, June 5th, 2023

      IEEE Nanotechnology Council TC10 – Modeling and Simulation announces its 2023 webinar series.

      Organizer: Josef Weinbub, TC 10 Vice Chair, weinbub@iue.tuwien.ac.at
      Format: 1 hour Webex webinars
      Announcements for each webinar will be posted with registration link to receive the link for that meeting.

      Webinar 1

      Date: June 27, 2023

      Time: 8:00 PDT, 17:00 CEST, 00:00 JST

      Speaker: Philippe Blaise, Atomistic Senior Application Engineer, Silvaco, Inc.

      Topic: Atomistic TCAD Simulations

       

      Webinar 2

      Date: October 12, 2023

      Time: 16:00 PDT, 1:00 CEST, 08:00 JST

      Speaker: Gerhard Klimeck, Professor and nanoHUB Director, Purdue University

      Topic: nanoHUB for Research and Education in Nanoelectronics

       

      Webinar 3

      Date: December 12, 2023

      Time: 23:00 PDT, 8:00 CEST, 15:00 JST

      Speaker: Tue Gunst, Senior R&D and Application Engineer, Synopsys QuantumATK

      Topic: QuantumATK Applied to Nanoelectronics