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Archive for the ‘Nano News’ Category

Quantum Technologies: Pathways Beyond Classical Systems Workshop

Wednesday, October 18th, 2023

Quantum Technologies: Pathways Beyond Classical Systems Workshop

 

Location & Time: Utah Valley University, CS 404 (800 W University Pkwy, Orem, UT 84058 USA), 1 – 5 pm MST [UTC -7], November 10, 2023

This high-level workshop aims to provide an overview of the current efforts to organize quantum-related academic, industrial, and professional activities in:
– Computer science
– Electrical and electronics engineering,
– Industrial standards development,
– Information science (including information technology management),
– Network architecture and infrastructure development, and
– Sustainability by design.

In person or virtual participation is open to all members of the public. Please register using this form: https://forms.gle/f4bmPRDie8g1BHAW9

Tentative agenda (official agenda to be mailed the week of the event):

13:00 – 13:50, Session 1 – Developing Technical Communities for Quantum Electrical Engineering (QEE) and Quantum Information Technology (QIT)
14:00 – 14:50, Session 2 – Roadmaps for QEE and QIT, and the Need for Ethically-Aligned Design (EAD)
15:00 – 15:50, Session 3 – Quantum Computer Architecture and Standardization
16:00 – 17:00 – Time allotted for networking and local community organizing

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits – Special Topic

Saturday, March 11th, 2023

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Special Topic on “Physics-based modeling and simulation of materials, devices and circuits of beyond-CMOS logic and memory technologies for energy efficient computing.”

 

Guest Editors

Aims and Scope
Standard Complementary Metal Oxide Semiconductor (CMOS) technology and its advanced flavors in the form of FinFETs have propelled the electronic industry to its extraordinary success. While the CMOS technology may continue to deliver its remarkably powerful performance to next-generation computing platforms, it is quite clear that in the longer term, it has major challenges in scaling, suffers from power consumption and power density limitations and may not be amenable to the new demands of the emerging applications. This will require beyond-CMOS technologies to step in and augment CMOS. Whether it is the design of energy efficient scalable switches for logic design, or non-volatile memory, or the integration of memory and logic functionalities for general-purpose computers and application-specific accelerators, the need for the application of quantum materials to realize these new microelectronic devices has surged.

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IEEE XCDC – Special Topic on Spintronic Devices for Energy Efficient Computing

Wednesday, July 27th, 2022

A call for papers is now open for the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC) special topic on “Spintronic Devices for Energy Efficient Computing”

Submission Deadline: September 5th, 2022

Aims and Scope

The inherent properties of ferromagnetic materials operating at room temperature and at the nanoscale coupled with various aspects of spin physics offer abundant possibilities and functionalities for developing novel computing and memory devices and their integration. The fundamental advantage of spintronic devices over the semiconductor-based switch is its projected ultra-low operation energy through different switching mechanisms. As an example, the interplay of ferroelectric effect (charge) and ferromagnetic effect (spin) can lead to the energy efficient switching. Meanwhile, the extremely efficient charge-to-spin conversion has become promising through the integration of recently discovered topological effects (topology and chirality) and ferromagnetic effect (spin). One of the key challenges for spintronic devices, the operation speed, has been well addressed recently through the usage of antiferromagnetic materials and the application of spin-orbit-torque switching mechanism and its interplay with other switching mechanisms.

The most apparent features of spintronic devices are their non-volatility and superior endurance behavior, where spin-based devices outperform other nonvolatile devices for designing computing blocks, nonvolatile processors, logic-in-memory arrays, hyper-dimensional computing. This will enable the energy-efficient computing systems of the future.

The intrinsic multi-functionalities of spintronic devices have generated many “unexpected computing devices and architectures” in the past decade. One example is the proposal and demonstration of the usage of magnetic tunnel junctions for computing using memory, stochastic computing and probabilistic computing.

This special topic of the IEEE JXCDC will publish original recent research centered around spintronic logic and memory devices for energy efficient computing, covering the research topics from new spintronic physics, new spintronic materials, to novel spintronic devices, to spintronic circuits and spintronic computing systems.

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Second University at Buffalo-IEEE Nano-Symposium

Monday, July 25th, 2022

The 2nd UB-IEEE Nano-Symposium will be held on September 21-23, 2022, at the University at Buffalo, The State University of New York.

The Symposium is chaired by Prof. Huamin Li (Department of Electrical Engineering) and sponsored by IEEE EDS Buffalo Chapter (Chair: Prof. Vasili Perebeinos), IEEE Buffalo Section (Chair: Padma Kasthurirangan), Department of Electrical Engineering (Chair: Prof. Jonathan Bird) and School of Engineering and Applied Sciences (Dean: Prof. Kemper Lewis) at the University at Buffalo.

Especially, a special session is organized on September 21 to celebrate “the 75th anniversary of the transistor”, in which a series of invited talks will review the transistor technology in different perspectives, including nanomaterials in transistors (Prof. Aaron Franklin, Duke University), two-dimensional transistors (Prof. Xiangfeng Duan, University of California, Los Angeles), tunnel transistors (Prof. Alan Seabaugh, University of Notre Dame), flexible transistors (Prof. John Rogers, Northwestern University), neuromorphic memtransistors (Prof. Mark Hersam, Northwestern University), and power transistors (Prof. Grace Xing, Cornell University).

For information on participation contact:

Huamin Li, Ph.D.
Department of Electrical Engineering
University at Buffalo, The State University of New York
Phone: (716) 645-1026
Email: huaminli@buffalo.edu

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Frequently Asked Questions

Wednesday, January 12th, 2022

Check out our FAQ page to find out more about

the IEEE Nanotechnology Council!

 

 

Current Status of Nano-scale Medicine Innovation

Wednesday, October 13th, 2021

The Society for HealthCare Innovation (SHCI) is a collaborative group of students, academics, and medical professionals who aim to advance novel ideas, science, and technologies in healthcare. Through their diverse interconnected networks of professionals from all avenues of the healthcare ecosystem, the SHCI seeks to push forward the frontiers of healthcare through innovation in workflows, adoption of new digital care models, and transformative technologies that impact the way we provide, receive, and pay for healthcare. To support these goals, the University of California – Santa Cruz Crown College and Center for Applied Values and Ethics in Advanced Technologies (CAVEAT) have partnered with the SHCI to develop their 2021 “Frontiers of Innovation” conference. This event will take place from October 25 – 29, 2021, in two-hour blocks from 2 – 4 pm Eastern, and will cover some of the recent developments in AI, Blockchain, DIY Biotechnology (Biohacking), Nanotechnology, and Neuolink-focused devices.

The NTC’s Vice-President for Conferences, Jin-Woo Kim, and Distinguished Lecturer, Elena Rozhkova, have graciously agreed to share their expertise in the realm of nanotechnology for medical research and implementation for this event. The 2021 Frontiers of Innovation Steering Committee would like to extend an invitation to anyone interested to join our conversation with them on October 26. Registration is free and open to the public, and a moderated conversation board will be open to allow participants the ability to connect and further the discussions that will take place during the week. For questions, please reach out to Tyler L. Jaynes – NTC/SC Chair and Steering Committee member.

Register for the event at this link.

National Nanotechnology Day (USA)

Thursday, September 30th, 2021

National Nanotechnology Day (USA)
Event Date: October 09, 2021

National Nanotechnology Day is an annual celebration featuring a series of community-led events and activities on or around October 9 to help raise awareness of nanotechnology, how it is currently used in products that enrich our daily lives, and the challenges and opportunities it holds for the future. This date, 10/9, pays homage to the nanometer scale, 10–9 meters.

Planning for various events and activities is underway at schools, universities, and various organizations around the country. Whether at home or outside, there are so many ways to explore advances in nanotechnology and how it is impacting our everyday lives!

See National Nanotechnology Day | National Nanotechnology Initiative for details.

 

IEEE Oregon Nanotechnology Chapter Presents Webinar on 4 Oct. 2021

Wednesday, September 29th, 2021

 

“Quasi 2D and 1D van der Waals Quantum Materials – From Physics to Device Applications” with Alexander A. Balandin, University of California, Riverside

Date/Time: October 4th, 2021 5-6:30 PM PT

Registration at:
https://events.vtools.ieee.org/m/281851

 

Vannevar Bush Faculty Fellows Program 2021 Class Announcement

Saturday, June 26th, 2021

Congratulations to NTC Awards Chair Alex Balandin, UC Riverside distinguished professor of electrical and computer engineering and materials science, who was selected for the DoD’s 2021 Vannevar Bush Faculty Fellows (VBFF) program.

On May 5th, the U.S. Department of Defense (DoD) announced the selection of eight distinguished faculty scientists and engineers for the 2021 Class of Vannevar Bush Faculty Fellows (VBFF). The highly competitive fellowship is the DoD’s flagship single investigator award for basic research. VBFF is sponsored by the Basic Research Office, Under Secretary of Defense for Research and Engineering, with grants managed by the Office of Naval Research.

The Vannevar Bush Faculty Fellowship is named in honor of Dr. Vannevar Bush, the Director of the Office of Scientific Research and Development after World War II. In line with Dr. Bush’s vision, the Fellowship aims to advance transformative, university-based fundamental research. For the FY21 competition, over 300 white papers were received, from which panels of experts recommended the final eight fellows. Each fellow will receive up to $3 million over the five-year fellowship term to pursue cutting-edge fundamental research projects.

Prof. Balandin’s topic is specifically on nanotechnology. The project is on creating a new research field: one-dimensional quantum materials. For their VBFF project, Balandin and co-workers will investigate formation of charge-density-wave condensate in one-dimensional Van der Waals materials. Other topics of interest include one-dimensional materials with strong spin-orbit coupling, phonon confinement, and quantization effects. Electronics experts expect that one-dimensional quantum materials can be used in a variety of electronic devices, with applications in low-power electronic circuits, quantum computers, small-size electromagnetic antennas for radiofrequency communications, and energy-conversion devices.

More information about the Vannevar Bush Faculty Fellowship is available on the DoD Basic Research Office website.

 

JXCDC Call for Papers on “Emerging Hardware for Cognitive Computing”

Tuesday, May 11th, 2021

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC): Call for Papers on “Emerging Hardware for Cognitive Computing”

A call for papers is now open for the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits special topic on “Emerging Hardware for Cognitive Computing.”

Aims and Scope:

Emerging materials and physics can be leveraged for new device-inherent behavior that can have system-level benefits. Motivation for device, circuit, and system behavior can be drawn from how the human brain processes certain data-intensive tasks adaptively and quickly, such as canonical image recognition. The field of neuromorphic computing has made great strides in implementing multi-weight synaptic behavior, as well as neuronal behavior such as integrate-and-fire and stochastic switching, and implementation of such behaviors in deep neural network (DNN) processing. Using CMOS, emerging resistive memories, and other device types as the basis, neuromorphic computing is innovating vertically from devices, to circuits, to systems to re-define how computation can be done. Looking forward, the realm of “cognitive computing” is inspired by new and continually emerging understanding of advanced brain and neuronal behavior that enables efficient and real-time learning and reaction.

This call for papers is on emerging hardware for cognitive computing. The focus and emphasis of these special topic papers is beyond DNN processing, as well as beyond multi-weight synapses and basic neuron integrating, firing, and stochasticity. Some example topics of interest include coherent reaction to multiple stimuli and input frequencies, hierarchical temporal memories, coupled dynamics between multiple stimuli and between devices or systems, both short-range and long-range connectivity in the devices and circuits, real-time adaptation to the data the computing system is processing, reconfigurability based on inputs, approximate computing that uses sparsity, and many other bio-inspired behaviors. Papers are encouraged that address implementation of advanced cognitive features at all levels (materials, device, circuits, and systems), including showing at a system level how such advanced functions can be useful for computing tasks and understanding the system-level energy efficiency and speed.

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