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Call for Papers JXCDC Special Issue “Modeling and simulation of emerging materials, devices and circuits”

Wednesday, June 11th, 2025

CALL FOR PAPERS

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Special Issue on “Modeling and simulation of emerging materials, devices and circuits for energy-efficient computing”.

Guest Editor: Sumeet K. Gupta, Purdue University, guptask@purdue.edu

Editor-in-Chief: Azad Naeemi, Georgia Institute of Technology, azad@gatech.edu

Aims and Scope

Standard Complementary Metal Oxide Semiconductor (CMOS) technology and its advanced flavors in the form of FinFETs have propelled the electronic industry to its extraordinary success. While the CMOS technology may continue to deliver its remarkably powerful performance to next generation computing platforms, it is quite clear that in the longer term, it has major challenges in scaling, suffers from power consumption and power density limitations and may not be amenable to the new demands of the emerging applications. This will require beyond-CMOS technologies to step in and augment CMOS. Whether it is the design of energy efficient scalable switches for logic design, or non-volatile memory, or the integration of memory and logic functionalities for general-purpose computers and application-specific accelerators, the need for the application of quantum materials to realize these new microelectronic devices has surged. To effectively utilize the unique and promising attributes of the emerging technologies, it is of paramount importance that their experimental discoveries and advancements are well supported by the understanding of the underlying physics and their implications at the materials, device, circuit, and system levels. To accelerate and achieve this, modeling of novel materials and devices is expected to play a major role. On one hand, the models should provide important physical insights into the material properties and the device operation and scalability; on the other hand, they should enable efficient and accurate estimations of the performance and energy efficiency of the circuits based on the emerging technologies. Therefore, models at different levels of design abstraction will be needed as we tackle the challenges of finding revolutionary breakthroughs in computing and storage.

As a step towards addressing this grand challenge of developing advanced modeling and simulation frameworks for the exploration of beyond CMOS devices, the IEEE Journal on Exploratory Computational Devices and Circuits (JXCDC) aims to bring together important and impactful works in this area in a special topic focusing on various aspects of modeling and simulations of emerging materials, devices and circuits for standard and beyond-von-Neumann computing. The scope of this issue spans ‘First-Principles Modeling’, “Physics-based Modeling” and Circuit-Compatible Modeling”.

Topics of interest include but are not limited to:

  • Modeling and simulations of emerging logic materials and devices such as: o 1D and 2D materials
    • Steep sub-threshold swing devices such as Tunneling FETs and Negative-capacitance transistors
    • Spintronic devices
    • Back-end of the line (BEOL) devices for 3D logic and memory
  • Modeling and simulations of embedded non-volatile memories in logic o Resistive RAMs
  • Ferroelectric (FE) based memories (FE-transistors, FE-tunnel junctions etc.)
  • Spin-based memories including memories based upon magneto-electric and valley-tronics phenomena.
  • Back-end of the line (BEOL) memories
  • Modeling and simulations of advanced interconnects
  • Modeling and simulation of beyond-von-Neumann computing primitives based on emerging materials and devices such as
    • Artificial neurons and synapses for analog, spiking, oscillatory and other neural networks
    • Stochastic and probabilistic computing primitives
  • Cryogenic device modeling and simulations for logic and memory applications
  • Variation and reliability modeling

Important Dates

  • Open for Submission: June 1st, 2025
  • Submission Deadline: August 15th, 2025
  • First Notification: September 15th, 2025
  • Revision Submission: October 1st, 2025
  • Final Decision: November 1st, 2025
  • Online Special Topic Publication: November 15, 2025

Submission Site

Submit your paper through the JxCDC submission site: https://ieee.atyponrex.com/journal/JXCDC

 

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IEEE-NANO 25th Anniversary Celebration

Thursday, April 24th, 2025

 

Since its founding in 2001, IEEE-NANO has been the flagship conference of the IEEE Nanotechnology Council (NTC). Its sustained support and promotion of advanced research in nanoscience and nanotechnology is unsurpassed in the technical community. Over the years, IEEE-NANO has been held around the globe in China, Germany, Japan, Canada, Spain, the United Kingdom, Italy, South Korea, Ireland, the United States, and online (we will never forget the COVID years) and has benefited from the efforts of countless volunteers. Their ongoing commitment to the NTC and to NANO has allowed our community to share advancements and recognize accomplishments in nanotechnology.

At its beginning, IEEE-NANO was the forum where the current World Nanotechnology Leaders first reported their work and contributed to the development and visibility of many researchers all over the globe. The nanotechnology field has evolved with the times, but the spirit of the IEEE-NANO conference remains. It fosters research discovery, technical innovation, and reduction to practice – the hallmarks of a vibrant technical community.

Please join us as we celebrate the history of this important conference at the 25th IEEE International Conference on Nanotechnology (IEEE-NANO 2025) in Washington, DC, USA, 13 – 16 July 2025.

Please contact us (spicer@jhu.edu) if you have precious moments from previous IEEE NANO conferences that you would like to share with us and with the nanotechnology community.

 

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Quantum Technologies: Pathways Beyond Classical Systems Workshop

Wednesday, October 18th, 2023

Quantum Technologies: Pathways Beyond Classical Systems Workshop

 

Location & Time: Utah Valley University, CS 404 (800 W University Pkwy, Orem, UT 84058 USA), 1 – 5 pm MST [UTC -7], November 10, 2023

This high-level workshop aims to provide an overview of the current efforts to organize quantum-related academic, industrial, and professional activities in:
– Computer science
– Electrical and electronics engineering,
– Industrial standards development,
– Information science (including information technology management),
– Network architecture and infrastructure development, and
– Sustainability by design.

In person or virtual participation is open to all members of the public. Please register using this form: https://forms.gle/f4bmPRDie8g1BHAW9

Tentative agenda (official agenda to be mailed the week of the event):

13:00 – 13:50, Session 1 – Developing Technical Communities for Quantum Electrical Engineering (QEE) and Quantum Information Technology (QIT)
14:00 – 14:50, Session 2 – Roadmaps for QEE and QIT, and the Need for Ethically-Aligned Design (EAD)
15:00 – 15:50, Session 3 – Quantum Computer Architecture and Standardization
16:00 – 17:00 – Time allotted for networking and local community organizing

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits – Special Topic

Saturday, March 11th, 2023

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Special Topic on “Physics-based modeling and simulation of materials, devices and circuits of beyond-CMOS logic and memory technologies for energy efficient computing.”

 

Guest Editors

Aims and Scope
Standard Complementary Metal Oxide Semiconductor (CMOS) technology and its advanced flavors in the form of FinFETs have propelled the electronic industry to its extraordinary success. While the CMOS technology may continue to deliver its remarkably powerful performance to next-generation computing platforms, it is quite clear that in the longer term, it has major challenges in scaling, suffers from power consumption and power density limitations and may not be amenable to the new demands of the emerging applications. This will require beyond-CMOS technologies to step in and augment CMOS. Whether it is the design of energy efficient scalable switches for logic design, or non-volatile memory, or the integration of memory and logic functionalities for general-purpose computers and application-specific accelerators, the need for the application of quantum materials to realize these new microelectronic devices has surged.

(more…)

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IEEE XCDC – Special Topic on Spintronic Devices for Energy Efficient Computing

Wednesday, July 27th, 2022

A call for papers is now open for the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC) special topic on “Spintronic Devices for Energy Efficient Computing”

Submission Deadline: September 5th, 2022

Aims and Scope

The inherent properties of ferromagnetic materials operating at room temperature and at the nanoscale coupled with various aspects of spin physics offer abundant possibilities and functionalities for developing novel computing and memory devices and their integration. The fundamental advantage of spintronic devices over the semiconductor-based switch is its projected ultra-low operation energy through different switching mechanisms. As an example, the interplay of ferroelectric effect (charge) and ferromagnetic effect (spin) can lead to the energy efficient switching. Meanwhile, the extremely efficient charge-to-spin conversion has become promising through the integration of recently discovered topological effects (topology and chirality) and ferromagnetic effect (spin). One of the key challenges for spintronic devices, the operation speed, has been well addressed recently through the usage of antiferromagnetic materials and the application of spin-orbit-torque switching mechanism and its interplay with other switching mechanisms.

The most apparent features of spintronic devices are their non-volatility and superior endurance behavior, where spin-based devices outperform other nonvolatile devices for designing computing blocks, nonvolatile processors, logic-in-memory arrays, hyper-dimensional computing. This will enable the energy-efficient computing systems of the future.

The intrinsic multi-functionalities of spintronic devices have generated many “unexpected computing devices and architectures” in the past decade. One example is the proposal and demonstration of the usage of magnetic tunnel junctions for computing using memory, stochastic computing and probabilistic computing.

This special topic of the IEEE JXCDC will publish original recent research centered around spintronic logic and memory devices for energy efficient computing, covering the research topics from new spintronic physics, new spintronic materials, to novel spintronic devices, to spintronic circuits and spintronic computing systems.

(more…)

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Second University at Buffalo-IEEE Nano-Symposium

Monday, July 25th, 2022

The 2nd UB-IEEE Nano-Symposium will be held on September 21-23, 2022, at the University at Buffalo, The State University of New York.

The Symposium is chaired by Prof. Huamin Li (Department of Electrical Engineering) and sponsored by IEEE EDS Buffalo Chapter (Chair: Prof. Vasili Perebeinos), IEEE Buffalo Section (Chair: Padma Kasthurirangan), Department of Electrical Engineering (Chair: Prof. Jonathan Bird) and School of Engineering and Applied Sciences (Dean: Prof. Kemper Lewis) at the University at Buffalo.

Especially, a special session is organized on September 21 to celebrate “the 75th anniversary of the transistor”, in which a series of invited talks will review the transistor technology in different perspectives, including nanomaterials in transistors (Prof. Aaron Franklin, Duke University), two-dimensional transistors (Prof. Xiangfeng Duan, University of California, Los Angeles), tunnel transistors (Prof. Alan Seabaugh, University of Notre Dame), flexible transistors (Prof. John Rogers, Northwestern University), neuromorphic memtransistors (Prof. Mark Hersam, Northwestern University), and power transistors (Prof. Grace Xing, Cornell University).

For information on participation contact:

Huamin Li, Ph.D.
Department of Electrical Engineering
University at Buffalo, The State University of New York
Phone: (716) 645-1026
Email: huaminli@buffalo.edu

(more…)

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Frequently Asked Questions

Wednesday, January 12th, 2022

Check out our FAQ page to find out more about

the IEEE Nanotechnology Council!

 

 

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Current Status of Nano-scale Medicine Innovation

Wednesday, October 13th, 2021

The Society for HealthCare Innovation (SHCI) is a collaborative group of students, academics, and medical professionals who aim to advance novel ideas, science, and technologies in healthcare. Through their diverse interconnected networks of professionals from all avenues of the healthcare ecosystem, the SHCI seeks to push forward the frontiers of healthcare through innovation in workflows, adoption of new digital care models, and transformative technologies that impact the way we provide, receive, and pay for healthcare. To support these goals, the University of California – Santa Cruz Crown College and Center for Applied Values and Ethics in Advanced Technologies (CAVEAT) have partnered with the SHCI to develop their 2021 “Frontiers of Innovation” conference. This event will take place from October 25 – 29, 2021, in two-hour blocks from 2 – 4 pm Eastern, and will cover some of the recent developments in AI, Blockchain, DIY Biotechnology (Biohacking), Nanotechnology, and Neuolink-focused devices.

The NTC’s Vice-President for Conferences, Jin-Woo Kim, and Distinguished Lecturer, Elena Rozhkova, have graciously agreed to share their expertise in the realm of nanotechnology for medical research and implementation for this event. The 2021 Frontiers of Innovation Steering Committee would like to extend an invitation to anyone interested to join our conversation with them on October 26. Registration is free and open to the public, and a moderated conversation board will be open to allow participants the ability to connect and further the discussions that will take place during the week. For questions, please reach out to Tyler L. Jaynes – NTC/SC Chair and Steering Committee member.

Register for the event at this link.

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National Nanotechnology Day (USA)

Thursday, September 30th, 2021

National Nanotechnology Day (USA)
Event Date: October 09, 2021

National Nanotechnology Day is an annual celebration featuring a series of community-led events and activities on or around October 9 to help raise awareness of nanotechnology, how it is currently used in products that enrich our daily lives, and the challenges and opportunities it holds for the future. This date, 10/9, pays homage to the nanometer scale, 10–9 meters.

Planning for various events and activities is underway at schools, universities, and various organizations around the country. Whether at home or outside, there are so many ways to explore advances in nanotechnology and how it is impacting our everyday lives!

See National Nanotechnology Day | National Nanotechnology Initiative for details.

 

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IEEE Oregon Nanotechnology Chapter Presents Webinar on 4 Oct. 2021

Wednesday, September 29th, 2021

 

“Quasi 2D and 1D van der Waals Quantum Materials – From Physics to Device Applications” with Alexander A. Balandin, University of California, Riverside

Date/Time: October 4th, 2021 5-6:30 PM PT

Registration at:
https://events.vtools.ieee.org/m/281851

 

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