IEEE Nanotechnology Magazine ( 2015 September Issue) features
Akinwande, D. ; Li Tao ; Qingkai Yu ; Xiaojing Lou ; Peng Peng ;Kuzum, D.
How to cite: IEEE Nanotechnology Magazine Volume 9, Issue 3 , 6 – 14, 2015. Doi: 10.1109/MNANO.2015.2441105
Since its successful exfoliation and epitaxial growth in 2004 [1], [2], graphene, a honeycomb sp2 carbon lattice, has attracted interest because of its intrinsic high flexibility, electrical conductivity, and mobility. Among the various approaches to producing graphene, chemical vapor deposition (CVD) [3] is one of the most practical methods to scale up graphene film for either research or practical device engineering. This article will illustrate real-life examples of CVD-synthesized large-area graphene deployed in commercialized personal devices, plastic nanoelectronics, and neurotechnology.
How to cite: IEEE Nanotechnology Magazine Volume 9, Issue 3 , 15-24, 2015. Doi: 10.1109/MNANO.2015.2441106
Aggressive scaling of complementary metal-oxide-semiconductor (CMOS) technologies in the past decade has left circuit engineers with a plethora of design challenges. As the feature size in CMOS scales below 22 nm, static power dissipation due to multiple sources of leakage (weak inversion current, drain induced barrier lowering, gate induced drain leakage, gate tunneling, etc.) becomes significantly large in digital circuits. The supply voltage, on the other hand, does not scale down equally. Therefore, the shorter channel length along with a high supply voltage leads to a high leakage power dissipation. Integrated systems are facing an increasing leakage to active power ratio [1]. Leakage is more pronounced in low-speed applications, such as biomedical devices, where the performance is limited to a few megahertz [2]. Another obstacle, which is mainly a concern for high-speed applications, is the increasing energy density [3], which requires complicated cooling schemes and packaging. Furthermore, battery technologies are not growing as fast as CMOS technology, leaving large portable systems with a few microwatts of power to live on. The obstacles facing circuit designers call for novel solutions to enable the industry to push the integration density as prophesized by Moore’s law [4]. Alternative technologies need to be combined with CMOS to overcome the shortcomings of CMOS technologies.
Mi Li ; Lianqing Liu ; Ning Xi ; Yuechao Wang
How to cite: IEEE Nanotechnology Magazine Volume 9, Issue 3 , 25-35, 2015.
Doi: 10.1109/MNANO.2015.2441110
Cells are the structural and functional unit of living organisms. Knowledge of cellular behaviors is critical for us to understand the underlying mechanisms that guide the physiological and pathological changes in living organisms. So far, virtually all knowledge of the molecular reactions in cells has come from the ensemble measurements done in test tubes with purified molecules [1], [2]. The disadvantage of this approach is that experiments with purified molecules require the lysis of cells, meaning that the obtained results may not reflect the real situations of living cells.
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