| Share: 
A call for papers is now open for the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC) special topic on “Cryogenic Semiconductor Devices and Circuits for Computing.” JXCDC is an “Open Access” journal for publication of research using exploratory materials and devices aimed at novel energy efficient computation beyond standard CMOS (Complementary Metal Oxide Semiconductor) transistor technology.
Cryogenic semiconductor electronics is expected to have a re-birth due to advances in quantum computing, medical and scientific instrumentation, aviation, space exploration, etc. Emerging materials and physics can be leveraged for new cryogenic device-inherent behavior that can have system-level benefits. Cryogenic semiconductor devices including transistors, emerging resistive memories, and other device types as the basis, can innovate the entire computing stack from materials to systems and thus re-define how computation can be done. Looking forward, the realm of cryogenic electronics is inspired by the new and continually emerging understanding of cryogenic semiconductor physics applications.
This call for papers is on emerging cryogenic semiconductor devices and circuits for high performance computation. The focus and emphasis of these special topic papers is beyond Josephson junctions based devices and circuits; such as single flux quantum (SFQ), etc. Some example topics of interest include cryogenic memories, short-range and long-range connectivity in the devices and circuits, etc. Papers are encouraged that address new emerging functionality at cryogenic temperatures at all levels (materials, device, circuits, and systems), including showing at a system level how such advanced functions can be useful for computing tasks and understanding the system-level energy efficiency and speed.
Topics of Interest:
- CryoCMOS
- Physics of operation and device/circuit performance of different semiconductor materials at cryogenic temperatures: Si, Ge, GaN, SiC, III-V etc
- The potential of operation at cryogenic temperatures for emerging materials such as carbon nanotubes, graphene, ferroelectrics etc.
- Memory operation at cryogenic temperatures, including: DRAM, floating gate/charge trapping, and emerging memories (e.g. MRAM, RRAM, PCM, FeFETs, etc)
- Analog, digital electronics circuits for general purpose computing, graphics and AI
- Short- and long-range connectivity in cryogenic devices and circuits
- System-circuit-device co-design for cryogenic semiconductor electronics
- Prototypes, simulation, and theory all welcome
For complete details see the Call for Papers at JXCDC.
Important Dates:
Submission Deadline: 1 October 2021
First Notification: 1 November 2021
Revision Submission: 15 November 2021
Final Decision: 1 December 2021
Publication Online: 15 December 2021
All inquiries for the JXCDC Journal should be sent to JXCDC@IEEE.ORG.
Guest Editor: Victor Zhirnov, Semiconductor Research Corporation, zhirnov@src.org
Editor-in-Chief: Azad Naeemi, Georgia Institute of Technology, azad@gatech.edu
The IEEE NTC is a Technical co-sponsor of JXCDC.