Vision & Strategy

The scope of this TC is to serve as an interdisciplinary guide for scientists working in Semiconductor Packaging Process, Equipment, materials, substrates, Design, and EDA with the main goal to bring researchers of these different communities to create a common language and ecosystem for chiplets.

Topics of Interest

2.5D and 3D integration, interposer-based integration, die to wafer, wafer to wafer and die-to-die bonding, Chiplet Design, thermal management, power delivery, signal integrity, software/hardware co-design, System Technology Co-optimization (STCO). CPUs, GPUs, networking chips, AI accelerators.

Objectives

Promotion of technological innovation and excellence in chiplet and the ecosystem surrounding chiplets such as substrate, equipment, materials, Design, EDA for facing societal challenges through participations in NTC conferences, publications and other outreach and education activities. Moreover, we also emphasis on global collaborations, inclusion, and diversity.

Leadership

NameAffiliationEmail
Chair
Moitreyee Mukherjee-RoyIBM Research, USAmukherjm@us.ibm.com
Co-Chair(s)
Pedram Khalili AmiriNorthwestern University, USApedram@northwestern.edu
Members
Surya BhattacharyaInstitute Of Microelectronics, Singaporebhattass@ime.a-star.edu.sg
Nilesh BadweIIT Kanpur, Indianbadwe@iitk.ac.in
Veeresh DeshpandeIIT Bombayveeresh@iitb.ac.in
Isabel DesouzaIBM, Bromont, Canadaidesousa@ca.ibm.com
Giovanni FinocchioUniv.of Messina, Italygiovanni.finocchio@unime.it
Siping GaoNanjing Univ of Aeronautics& Astronauticsgao.sp@nuaa.edu.cn
Williamson JaimalTexas InstrumentsJaimal@ti.com
Fernanda KastensmidtUniversidade Federal do Rio Grande do Sul – Brasilfglima@inf.ufrgs.br
Weiqiang LiuNanjing University of Aeronautics and Astronautics, Nanjingliuweiqiang@nuaa.edu.cn
Rob PeltAMD FellowRobert.Pelt@amd.com
Prabhakar SubrahmanyamTechnical Lead & Sr. Staff Thermal Architect, Intelprabhakar.subrahmanyam@intel.com
Srikanth RangarajanUniversity of Binghamptonsrangar@binghamton.edu
Updated 08/15/25