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Call for Papers – Special Issue – IEEE xCDC Journal (Deadline extended Dec 31st, 2018)


IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Special Issue on Nonvolatile Memory for Efficient Implementation of Neural/Neuromorphic Computing

Guest Editor: Shimeng Yu, Georgia Institute of Technology,

Editor-in-Chief: Ian Young, Intel,

This special issue of the IEEE Journal on Exploratory Computational Devices and Circuits (JXCDC) aims to call for the recent research progress of the NVM based neuromorphic computing from device-level, array-level up to system-level. The interaction and co-optimization between materials/device engineering and circuit/architecture is solictated.

Download complete CFP here

Topics of Interests

Prospective authors are invited to submit original works and/or extended works based on conference presentations on the topics from a wide range of NVM based neuromorphic computing. Here the NVM devices include but not limit to the following: PCM, RRAM/CBRAM, STT-MRAM (or other spintronic memory), ferroelectric based memory including FeFET or Ferroelectric Tunnel Junction (FTJ), floating-gate or charge-trap transistor, NOR and NAND Flash, etc. The following topics are solicited:

  • NVM materials/devices for neurons
  • NVM materials/devices for synapses
  • Selector materials/devices for crossbar array for analog in-memory computation
  • Array-level demonstration for analog in-memory computation
  • NVM based inference engine design including peripheral circuitry
  • NVM based training accelerator design including peripheral circuitry
  • Architectural-level design for processing-in-memory or compute-in-memory with NVM
  • Brain-inspired spiking neural networks with NVM
  • Hardware-aware neuromorphic learning algorithms and architectures
  • Benchmarking tools for NVM based hardware accelerator design

Important Dates
Open for Submission: August 1th, 2018
Submission Deadline: December 1st, 2018 (Deadline extended upto December 31st, 2018 )
First Notification: January 10th, 2019
Revision Submission: February 10th, 2019
Final Decision: March 10th, 2019
Publication Online: April 1st, 2019

Submission Guidelines

The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC) IS AN OPEN ACCESS ONLY PUBLICATION: Charge for Authors: $1,350 USD per paper. Paper submissions must be done through the ScholarOne Manuscripts website:

Guidelines for papers and supplementary materials, as well as a paper template, are provided at this website (also on the next page).

Inquiries for the JxCDC Journal should be sent to:  JXCDC@IEEE.ORG

JxCDC is sponsored by;
Solid-State Circuits Society                               Magnetics Society
Circuits & Systems Society                               Nanotechnology Council
Computer Society                                             Electron Devices Society
Council on Electronic Design Automation
Council on Superconductivity


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