IEEE NTC 2026 TC 19 Heterogenous Integration & Chiplets February Webinar

Title: “Emerging Technologies in the Era of Automotive Chiplets including Review of Cost Considerations”

Date: 24-February 2026

Time: 10:00-11:00 AM CST 

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The NTC Heterogenous Integration and Chiplets Technical Committee (TC19) is organizing an online workshop on February 24, 2026 with eminent speakers from the industry. Presenters will add breadth in discussing “Emerging Technologies in the Era of Automotive Chiplets including Review of Cost Considerations.”

Host: Jaimal Williamson (Texas Instruments) TC19 committee member

Speaker 1 – Vikas Gupta (ASE)

Title: “Chiplets and Advanced Packaging for Automotive: Motivation and Opportunities”

ABSTRACT:

Software-Defined Vehicles (SDVs), enabled by advancements in electrical/electronic (E/E) and software architectures, are poised to play a pivotal role in reshaping the automotive and semiconductor value chains. Automotive E/E architectures have progressed from a decentralized model to more centralized approaches, incorporating zonal controllers and central compute units. This evolution drives silicon consolidation and greater functional integration. Emerging vehicle platforms now combine CPUs, memory, and hardware accelerators, often implemented using advanced semiconductor nodes. However, the transition to these advanced nodes presents cost management challenges. While chiplet-based architectures are gaining traction across sectors such as high-performance computing and consumer electronics, automotive applications pose unique constraints, including stringent reliability, safety, and lifecycle requirements.

This presentation explores the growing motivation behind adopting chiplets and advanced packaging technologies in automotive applications, highlighting the benefits of enhanced product configurability, design flexibility, and reduced time-to-market. The use of chiplets and advanced packaging also presents opportunities to address reliability challenges commonly associated with traditional automotive processor packages. Furthermore, the talk provides an update on two fan-out packaging solutions tailored for automotive use cases: one enabling multi-SoC/chiplet integration, and the other supporting SoC-to-HBM3 integration. Both solutions leverage ASE’s VIPack™ FOCoS (Fan-Out Chip-on-Substrate) Chip-Last technology to meet the stringent demands of automotive environments.

BIO:

Vikas Gupta brings over two decades of expertise in semiconductor packaging, shaped by roles across academia and industry at Lucent Technologies, Lehigh University, Texas Instruments, and ASE Group. As Director of Engineering, Technical Promotion, and Marketing at ASE, he leads innovation and strategic advancement in next-generation packaging technologies.

Vikas holds more than 25 U.S. patents and over 40 publications. He chairs the Automotive Technical Working Group of the Heterogeneous Integration Roadmap (HIR), serves as a Director at IMAPS, and contributes to the IEEE ECTC’s Applied Reliability Committee — driving thought leadership and collaboration across the semiconductor ecosystem.

Speaker 2 – Nokibul Islam (STATS ChipPAC)

Title: “Low cost chiplet packaging”

ABSTRACT:

Chiplets, small IC dies with specialized functions that can be combined to form complex chips, are an attractive solution for advanced silicon process nodes. However, packaging them at a reasonable cost creates many challenges. Several approaches are widely available, including fine line and space standard substrate, Si interposer, RDL interposer, and embedded bridge die in RDL interposer. An analysis of the various processes and technologies shows that RDL interposer solution offers the best cost-performance tradeoffs.

BIO:

Dr. Nokibul Islam is the Sr. Director of STATS ChipPAC Business Unit, where he leads product business development, technology qualification, and technology promotion. With over 21 years of experience in semiconductor product management, business development, and advanced packaging, he previously played a key role in Amkor Technology’s R&D team, focusing on product development, characterization, and process improvement. He is actively involved in leading industry conferences such as IMAPS, ECTC, InterPack, ISES, Chiplet Summit, etc. and has contributed extensively to many international publications.